P599
FPGA-based USM Main PMC
Hauptmerkmale
- Main PMC for USM Universal Submodules
- 1 USM slot
- 1 FPGA 33,216 LE (for user-defined I/O and Nios soft core)
- 32 MB DDR2 SDRAM
- 2 MB Flash
- -40 °C to +85 °C
USM Universal Submodules make PMC modules more flexible than ever. The main PMC P599 gets its specific function through the IP cores implemented inside its onboard FPGA. This function can be changed at any time through implementation of different IP cores. The corresponding line drivers are realized on the USM which is simply plugged on the P599.
The same USM may also be used on XMCs, conduction-cooled PMCs or M-Module main modules. A new design is then limited to the USM module and the FPGA content andtherefore saves development time and costs. A Nios soft processor implemented in the Cyclone II FPGA by Altera provides local intelligence where needed. The I/O signals are led to the USM and then to a SCSI connector at the front of the P599.
The growing range of Wishbone-based standard IP cores from duagon comprise different UARTs, Ethernet, fieldbus interfaces, graphics, digital I/O etc. For users who like to write and/or implement specific IP cores on their own a complete FPGA USM development kit is available.
The USM concept has been developed for harsh environments. Therefore, the P599 uses robust connectors to the USM, while all other components are soldered, and operates in a -40 to +85 °C temperature range with qualified components.
The P599 is aPMC mezzanine card suitable for any PMC compliant host carrier board in any type of bus system, i.e. CPCI, VME or on any type of stand-alone SBC. Appropriate PMC carrier cards in 3U, 6U and other formats are available from duagon or other manufacturers.
- User-defined through FPGA
- Line drivers and/or additional hardware implemented on USM Universal Submodule (not included)
- 32 MB SDRAM memory
- Soldered
- DDR2
- 132 MHz memory bus frequency
- FPGA-controlled
- 2 MB non-volatile Flash
- For FPGA data and Nios firmware
- FPGA-controlled
- Standard factory FPGA configuration:
- Main bus interface
- Altera SOPC Unit incl. Nios II/f soft processor, GPIO, UART and DDR2 SDRAM control
- Wishbone-to-Avalon/Avalon-to-Wishbone bridges
- Chameleon Table V2
- Interrupt controller, SMBus controller
- PCI to Wishbone bridge, ID EEPROM emulation
- 16Z045_FLASH - Flash interface
- 16Z034_GPIO - GPIO controllers (2 IP cores, for onboard LEDs and 8-bit I/O)
- The FPGA offers the possibility to add customized I/O functionality. Contact duagon for more information.
- One slot for a standard USM module
- For implementation of line drivers and/or additional hardware
- Eight front-panel LEDs, FPGA-controlled
- I2C interface to detect the USM module
- Compliant with PCI Specification 2.2
- 32-bit/33-MHz, 3.3 V V(I/O)
- Target
- Isolation voltage:
- Voltage depends on implementation and signal routing of USM
- Supply voltage/power consumption:
- +5 V (-3%/+5%), FPGA idle / US0 plugged: 83 mA, memory test / US0 plugged: 109 mA
- +3.3 V (-5%/+5%), FPGA idle / US0 plugged: 74 mA, memory test / US0 plugged: 82 mA
- MTBF: 669 963 h @ 40 °C according to IEC/TR 62380 (RDF 2000)
- Dimensions: conforming to IEEE 1386.1
- Weight: 65 g (w/o USM module)
- Temperature range (operation):
- -40 °C to +85 °C
- Airflow: min. 10 m³/h
- Temperature range (storage): -40 °C to +85 °C
- Relative humidity (operation): max. 95% non-condensing
- Relative humidity (storage): max. 95% non-condensing
- Altitude: -300 m to +3000 m
- Shock: 15 g / 11 ms
- Bump: 10 g / 16 ms
- Vibration (sinusoidal): 2 g / 10 Hz to 150 Hz
- Nios sample design for Quartus II development tools
- Flash update tools for Linux, Windows, VxWorks, QNX
- Driver software depending on implemented FPGA functions
- For more information on supported operating system versions and drivers see Software.